 |
 |
 |
 |
 |
 |
 |
| |
 |
| |
|
|
| |
|
 |
|
| |
 |
| |
|
| |
 |
|
| |
|
| |
|
| |
 |
| |
|
| |
 |
| |
| |
|
±âº»Ç°¸ñ |
| |
MP3100X ¸ÞÀκ¸µå
7.5V 1000mA DC Adaptor
FPGA Configuration¿ë Parallel
Cable
MP3100X »ç¿ëÀÚ¼³¸í¼
¾Ë·ç¹Ì´½ ÄÉÀ̽º |
 |
|
|
Option ǰ¸ñ |
| |
Parallel-III DLC5 Cable
FPGA Configuration¿ë Xilinx
EEPROM ( XC18V01 ) |
|
|
|
| |
|
| |
 |
| |
| |
|
´Ù¾çÇÑ
I/O ÀÎÅÍÆäÀ̽º Á¦°ø |
| |
±âº»ÀûÀÎ ÀÔÃâ·Â ¼ÒÀÚµéÀ» ÀåÂøÇÏ¿© ¼Õ½±°í È¿À²ÀûÀÎ
½Ç½À °¡´É
FPGAÀÇ »ç¿ëÀÚ I/OÇÉ¿¡ ¿¬°áµÈ Connector¸¦
Á¦°øÇÔÀ¸·Î½á Logic Probe ¹× º¸µå È®Àå °¡´É
VGA, PS/2 Port µîÀ» Á¦°øÇÔÀ¸·Î½á ¸ð´ÏÅÍ
±¸µ¿È¸·Î ¹× Űº¸µå Á¦¾îȸ·Î ±¸Çö °¡´É
Serial Port¸¦ Á¦°øÇÏ¿© RS232 Á÷·ÄÅë½Å
ȸ·Î ±¸Çö °¡´É |
|
|
ROM Write ±â´É Áö¿ø |
| |
º°µµÀÇ ROM Writer ºÒÇÊ¿ä (Parallel-III
DLC5 Cable ÀÌ¿ë) |
|
|
SRAM¿¡ Á÷Á¢ ¾²±â/Àб⠱â´É Áö¿ø |
|
Åë½Å/³×Æ®¿÷ ÀÀ¿ëºÐ¾ßÀÇ ºó¹øÇÑ Memory Access ±¸Çö
°¡´É
Pipe-line Microprocessor ¼³°è½Ã ¼·Î ´Ù¸¥
ÀνºÆ®·°¼Ç ¸Þ¸ð¸®¿Í µ¥ÀÌÅ͸޸𸮠±¸Çö °¡´É |
|
|
| |
|
| |
 |
| |
 |
| |
|
| |
| |
|
Target
FPGA : Xilinx Spartan-II |
| |
±âº» XC2S100 (10¸¸Gate±Þ), ÃÖ´ë XC2S200
(20¸¸ Gate±Þ) |
|
|
Configuration EEPROM : Xilinx
XC18V01 (1MB) - OptionÆÇ¸Å |
|
Configuration¿ë Parallel-III
DLC5 Cable - OptionÆÇ¸Å |
|
Memory : 32KB SRAM * 2 |
|
|
|
Toggle Switch * 10 , Push Switch * 2 , 4x4
matrix Push Switch
4-digit 7 Segment * 2 , 1-digit 7 Segment
* 2
LED * 32 , LCD * 1(16X2 line)
Buzzer , OSC(25MHz - ±³Ã¼°¡´É) |
|
¿ÜºÎ Interface |
|
VGA Port, RS-232 Serial Åë½Å Port, PS/2 Port |
|
I/O È®Àå¿ë Connector |
|
|
| |
|
|
|
| |
|
|
|