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¼Ò·®ÀÇ Prototype ĨÀ» °æÁ¦ÀûÀÎ °¡°ÝÀ¸·Î °øÁ¤(MPW)
Full-Custom, Standard Cell, Customer Tooling(Wafer)
¼Ò·®¿¡¼­ Midium(500,2000 die, etc) ±îÁö Á¦ÀÛ °¡´É
Dedicated Run(COT :Customer Owned Tooling) °¡´É
  => Run Schedule¿¡ »ó°ü¾øÀÌ »ç¿ëÀÚ ÀÏÁ¤¿¡ ¸ÂÃç ¾ðÁ¦¶óµµ Á¦ÀÛ °¡´É
Mixed Signal(Analog¿Í Digital)·Î ¼³°èµÈ ºí·ÏÀÇ °ËÁõ
GaAs °øÁ¤À» ÀÌ¿ëÇÑ °íÁÖÆÄ È¸·Î ¼³°è
1´Þ¿¡ ÇÑ ¹ø Run Schedule·Î ºü¸¥ ÁøÇà ¹× ºü¸¥ ³³±â º¸Àå

 

 

 

 

 

CMOS Analog, Digital
CMOS RF
Image IC
CCD ÀÌ¿ë Display Chips
MEMS Device
GaAs, SiGe °øÁ¤ ¹× Device

 

 

 

 

 

±â¾÷ü, ¿¬±¸¼Ò, ´ëÇб³¿¡¼­ Àú·ÅÇÏ°í ºü¸£°Ô ¼Ò·®ÀÇ Chip Á¦ÀÛ¸¦ ¿øÇÏ´Â ºÐ.
¿¬±¸ °³¹ß¿ëÀ¸·Î »õ·Î¿î ±â´É·¼º´ÉÀÇ È¸·Î, ÀúÀü·Â ȸ·Î, °í¼Ó ȸ·ÎµîÀ» ¼³°è·Á¦ÀÛ
  ÇϰíÀÚ ÇÏ´Â ºÐ.
±¹³» ÁÖ¿ä Customer
  - ETRI, KETI, KT(Çѱ¹Åë½Å), KERI(Çѱ¹Àü±â¿¬±¸¿ø), »ï¼ºÁ¾±â¿ø, Analog Chips,
     Æ÷Ç×°ø´ë, KAIST, °æºÏ´ë, ±¤¿î´ë

 

 

 

 

MOSIS Fabrication Processes

IBM Fabrication Processes
IBM CMOS and IBM RF CMOS Processes
Feature Size Metal Voltage Process Name
65 nm 8 1.0 V core, 1.8, 1.5 V I/O

10SF


65 nm 8 1.2, 1.5 V core, 1.8 V I/O

10LPe


90 nm 8 1.0 V core, 2.5 V I/O

9SF


90 nm 8 1.2 V core, 2.5 V I/O

9LP


90 nm 8 1.2 V core, 2.5 V I/O

9RF


0.13 8 1.2/2.5

8RF-LM


0.13 8 1.2/2.5

8RF-DM


0.18 6 1.8/3.3

7SF


0.18 6 1.8/3.3

7RF


0.25 5 2.5/3.3

6RF


 
IBM SiGe BiCMOS Processes
Feature Size Metal CMOS
Vdd [V]
SiGe Ft [GHz] | BVceo(1) [V] Process Name
High Performance High Breakdown
0.13 7 1.2, 2.5, 3.3 200 | 1.77 57 | 3.55

8HP


0.13 5 1.2, 2.5, 3.3 103 | 2.4  54 | 4.7 

8WL


0.18 7 1.8, 2.5, 3.3 60 | 3.3  29 | 6.0 

7WL


0.18 5 1.8, 2.5, 3.3 120 | 2.0  20 | 4.75

7HP


0.25 5 2.5, 3.3 60 | 3.2  29 | 6.0 

6WL


0.25 6 2.5, 3.3 47 | 3.3  27 | 5.7 

6HP/6DM


0.35 4 3.3, 5.0 43 | 3.3  19 | 9.6 

5HPE


0.35 4 3.3, 5.0 35 | 5.5  25 | 7.5 

5PAe


0.50 5 3.3 51 | 3.3  27 | 5.5 

5DM


0.50 4 3.3 51 | 3.3  27 | 5.5 

5AM


0.50 4 3.3 51 | 3.3  24 | 7.0 

5PA


0.50 3 3.3 51 | 3.3  27 | 5.5 

5HP

 
IBM CIMG Process
(CMOS Image Sensor)

Feature Size Metal Voltage Process Name
0.18 4 1.8/3.3

CIMG7HY


0.18 4 1.8/3.3

CIMG7SF


IBM Fabrication Schedule

Technology

Customer Submission Date
SiGe BiCMOS Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
8HP 0.13 µm       21       11       8
8WL 0.13 µm   19       30       20    
7WL 0.18 µm 22   17   5   14   8   10  
6WL 0.25 µm     3               3  
5HPE 0.35 µm 14     7     7     6    
5PAe0.35 µm   11       16     22     1
5HP/5AM 0.50 µm   4       2         3  
CMOS Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
10LPe65 nm       7       25       15
10RFe65 nm       7       25       15
10SF 65 nm       7     28       24  
9SF 90 nm 28     21     21     27    
9RF 90 nm     17   27     25     24  
9LP 90 nm     17   27     25     24  
8RF-DM 0.13 µm 28   24   12   21   15      
8RF-LM 0.13 µm Submissions can be added to 8RF-DM runs with sufficent advance notice to support@mosis.com.
7RF 0.18 µm   11   14   23   4   20    


TSMC Fabrication Processes

Feature Size

Process

Description

TSMC 0.13 CL013G Standard logic, RPO
CR013G (CM013) Mixed-mode/RF, RPO, MiM
CL013LP Low-power logic, RPO
CL013LV Low-voltage logic, RPO

TSMC 0.18 CL018 Standard logic, RPO
CR018 (CM018) Mixed-mode/RF, RPO, MiM
CL018LP Low-power logic, RPO
CL018LV Low-voltage logic, RPO
CL018HV High-voltage, RPO

TSMC 0.25 CL025 Standard logic, RPO
CR025 (CM025) Mixed-mode/RF, RPO, MiM

TSMC 0.35 CL035 Standard logic, 5.0 V ESD, RPO
CM035 Mixed-mode/RF, 5.0 V ESD, PiP, 2-poly
CL035HV High-voltage, RPO

These processes use non-epitaxial wafers. Epitaxial wafers are available at an additional cost.

TSMC Fabrication Schedule
Technology Customer Submission Date
Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
CR013G (CM013G), CL013G 0.13 µm 28   3, 31 21 5 2, 16, 30   4, 18 2 6, 20 3 1
CL013LP 0.13 µm   19 3, 31 21 5 2, 16, 30   4, 18 2 6, 20 3 1
CL013LV 0.13 µm 28   3, 31 21 5 2, 16, 30   4, 18 2 6, 20 3 1
CR018 (CM018), CL018 0.18 µm 7   10, 24 7, 21 5, 12, 19 2, 16, 30 21 4, 25 8, 22 6, 20 3, 10, 17 1
CL018LP 0.18 µm   25 24   5, 19 16   4, 25 22   3, 17  
CL018LV 0.18 µm 28   10, 24 7, 21 5, 12 2, 16, 30 21 4 8, 22 6, 20 3, 10 1
CL018HV 0.18 µm   11     5     4     3  
CR025 (CM025), CL025 0.25 µm   11   7 5 2, 23 28   8, 29 27   1
CM035, CL035 0.35 µm     3     2   11   13   1
CL035HV 0.35 µm     3     2   11   13   1


AMIS Fabrication Processes

Feature Size Metal Voltage Description
0.35 4 3.3 Mixed-Mode,  I3T80

0.35 4 3.3 Mixed-Mode,  C3O
  The C3O process is available for dedicated runs, but not multi-project wafer runs.

0.50 3 5 Mixed-Mode,  C5

0.70 3 5 Mixed-Mode,  I2T100

1.50 2 5 Mixed-Mode,  ABN

AMIS Fabrication Schedule
Technology Customer Submission Date
Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
I3T80 0.35   25     12     25     24  
C5F/N 0.50 14 25   7 19 30   11 22   3 15
I2T100 0.70 14   31     9   18   27    
ABN 1.50 7   3 28   23   18   13   8


austriamicrosystems Fabrication Processes
Feature Size Metal Voltage Description
0.35 4 3.3/5 CMOS, 2-poly,  C35B4C3
 
  3.3/5 CMOS-Opto, 2-poly,  C35B4O1
 
  3.3/5 CMOS, Thick Metal, MiM,  C35B4M3
 
  50 HV-CMOS, High resistive poly,  H35B4D3

See Compare AMS 0.35 µm CMOS Processes

0.35 4 2.5 SiGe BiCMOS, MiM capacitor, and high resistive poly,  S35D4

0.80 2 50 HV-CMOS, 3-poly, high resistance, vertical NPN,  CXZ

austriamicrosystems Fabrication Schedule
Technology Customer Submission Date
Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
C35B4C3 0.35 CMOS 14   10 21   16 21   22 13    
C35B4O1 0.35 CMOS-Opto 14   10 21   16 21   22 13    
C35B4M3 0.35 Thick Metal CMOS   25       2     2   10  
H35B4D3 0.35 HV CMOS 28     28       4   27    
S35D4 0.35 SiGe   25       2     2   10  
CXZ 0.80 HV CMOS     3     23       6    

 

To be considered ontime for an MPW run, layout and paperwork are due to MOSIS by 1 PM PT (Pacific/California Time) on the date listed.

 

 

 

 

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